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SSM4800AGM
N-Channel Enhancement Mode P Power Mosfet
P
D D D G S D
PRODUCT SUMMARY
Simple Drive Requirement Low On-resistance Fast Switching Characteristic RoHS Compliant
BVDSS RDS(ON) ID
S
30V 18m 9.4A
SO-8
S
DESCRIPTION
The Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters.
D
G S
Pb-free; RoHS-compliant
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current
1 3 3
Rating 30 25 9.4 7.5 40 2.5 0.02 -55 to 150 -55 to 150
Units V V A A A W W/
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
THERMAL DATA Thermal Data
Symbol Rthj-a Parameter Thermal Resistance Junction-ambient
3
Value Max. 50
Unit /W
02/09/2007 Rev.1.00
D
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SSM4800AGM
ELECTRICAL CHARACTERISTICS
J Electrical Characteristics@Tj=25oC(unless otherwise specified)
@T = 25 C ( unless otherwise specified )
o
Symbol BVDSS
BVDSS/Tj
Parameter Drain-Source Breakdown Voltage
Test Conditions VGS=0V, ID=250uA
2
Min. 30 1 -
Typ. 0.02 14 18 16 7 1 4.5 7 8 18 8 420 210 70 3.5
Max. Units 18 30 3 1 25 100 12 670 5 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=9A VGS=4.5V, ID=7A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70oC)
VDS=VGS, ID=250uA VDS=10V, ID=9A VDS=30V, VGS=0V VDS=24V, VGS=0V VGS=25V ID=9A VDS=20V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
2
SOURCE-DRAIN DIODE Source-Drain Diode
Symbol VSD Parameter Forward On Voltage
2
Test Conditions IS=1.9A, VGS=0V IS=9A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 25 15
Max. Units 1.3 V ns nC
trr
Qrr
Reverse Recovery Time Reverse Recovery Charge
Notes:
1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board, t <10sec ; 125oC/W when mounted on Min. copper pad.
02/09/2007 Rev.1.00
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SSM4800AGM
50
50
T A =25 C
40
o
ID , Drain Current (A)
30
ID , Drain Current (A)
10V 7.0 V 5.0 V 4.5 V
T A = 150 C
40
o
10V 7.0 V 5.0 V 4.5 V
30
V G = 3.0 V
20
20
V G = 3.0 V
10
10
0 0 2 4 6
0 0 2 4 6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
37
1.8
32
ID=7A T A =25 Normalized RDS(ON)
1.4
ID=9A V G =10V
RDS(ON) (m)
27
22
1.0
17
12
0.6 2 4 6 8 10 -50 0 50 100 150
V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
1.4
10
8
1.2
6
T j =150 o C
4
T j =25 o C
Normalized VGS(th) (V)
IS(A)
1.0
0.8
2
0
0.6 0 0.2 0.4 0.6 0.8 1 1.2 -50 0 50 100 150
V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( o C)
Fig 5. Forward Characteristic of
Reverse Diode
02/09/2007 Rev.1.00
Fig 6. Gate Threshold Voltage v.s. Junction Temperature
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3
AP4800AGM
16 1000
SSM4800AGM
f=1.0MHz
ID=9A VGS , Gate to Source Voltage (V) C iss
12
C (pF)
V DS = 25 V V DS = 20 V V DS = 15 V
C oss
100
8
C rss
4
0 0 5 10 15
10 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
10
100us 1ms
Normalized Thermal Response (Rthja)
0.2
0.1
0.1
ID (A)
0.05
1
10ms 100ms 1s
0.02
0.01
PDM
0.01
Single Pulse
t T
Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthia=125 /W
0.1
T A =25 C Single Pulse
0.01 0.1 1 10
o
DC
0.001 100 0.0001 0.001 0.01 0.1 1 10 100
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
60
V DS =5V
VG QG
ID , Drain Current (A)
40
T j =25 C
o
T j =125 C
o
4.5V QGS QGD
20
Charge
0
Q
0
2
4
6
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
Fig 12. Gate Charge Waveform
02/09/2007 Rev.1.00
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SSM4800AGM
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
02/09/2007 Rev.1.00
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